; generated by Component: ARM Compiler 5.05 (build 41) Tool: ArmCC [4d0eb9]
; commandline ArmCC [--thumb --list --debug -c --asm --interleave -o.\obj\emac.o --asm_dir=.\Obj\ --list_dir=.\Obj\ --depend=.\obj\emac.d --apcs=interwork -O0 -IC:\Keil\ARM\RV31\INC -IC:\Keil\ARM\CMSIS\Include -IC:\Keil\ARM\Inc\Philips --omf_browse=.\obj\emac.crf ethernet\emac.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  write_PHY PROC
;;;89     //*****************************************************//
;;;90     void write_PHY (int PhyReg, int Value) {
000000  b410              PUSH     {r4}
;;;91       unsigned int tout;
;;;92     
;;;93       MAC_MADR = (PHY_ADDRESS<<8) | PhyReg;
000002  23ff              MOVS     r3,#0xff
000004  3301              ADDS     r3,#1
000006  4303              ORRS     r3,r3,r0
000008  4cfe              LDR      r4,|L1.1028|
00000a  62a3              STR      r3,[r4,#0x28]
;;;94       MAC_MWTD = Value;
00000c  0023              MOVS     r3,r4
00000e  62d9              STR      r1,[r3,#0x2c]
;;;95     
;;;96       /* Wait utill operation completed */
;;;97       tout = 0;
000010  2200              MOVS     r2,#0
;;;98       for (tout = 0; tout < MII_WR_TOUT; tout++) {
000012  46c0              MOV      r8,r8
000014  e007              B        |L1.38|
                  |L1.22|
;;;99         if ((MAC_MIND & MIND_BUSY) == 0) {
000016  4bfb              LDR      r3,|L1.1028|
000018  6b5b              LDR      r3,[r3,#0x34]
00001a  07db              LSLS     r3,r3,#31
00001c  0fdb              LSRS     r3,r3,#31
00001e  2b00              CMP      r3,#0
000020  d100              BNE      |L1.36|
;;;100          break;
000022  e004              B        |L1.46|
                  |L1.36|
000024  1c52              ADDS     r2,r2,#1              ;98
                  |L1.38|
000026  2305              MOVS     r3,#5                 ;98
000028  041b              LSLS     r3,r3,#16             ;98
00002a  429a              CMP      r2,r3                 ;98
00002c  d3f3              BCC      |L1.22|
                  |L1.46|
00002e  46c0              MOV      r8,r8
;;;101        }
;;;102      }
;;;103    }
000030  bc10              POP      {r4}
000032  4770              BX       lr
;;;104    
                          ENDP

                  read_PHY PROC
;;;105    unsigned short read_PHY (unsigned char PhyReg) {
000034  0002              MOVS     r2,r0
;;;106      unsigned int tout;
;;;107    
;;;108      MAC_MADR = (PHY_ADDRESS<<8) | PhyReg;
000036  20ff              MOVS     r0,#0xff
000038  3001              ADDS     r0,#1
00003a  4310              ORRS     r0,r0,r2
00003c  4bf1              LDR      r3,|L1.1028|
00003e  6298              STR      r0,[r3,#0x28]
;;;109      MAC_MCMD = MCMD_READ;
000040  2001              MOVS     r0,#1
000042  6258              STR      r0,[r3,#0x24]
;;;110    
;;;111      /* Wait until operation completed */
;;;112      tout = 0;
000044  2100              MOVS     r1,#0
;;;113      for (tout = 0; tout < MII_RD_TOUT; tout++) {
000046  46c0              MOV      r8,r8
000048  e007              B        |L1.90|
                  |L1.74|
;;;114        if ((MAC_MIND & MIND_BUSY) == 0) {
00004a  48ee              LDR      r0,|L1.1028|
00004c  6b40              LDR      r0,[r0,#0x34]
00004e  07c0              LSLS     r0,r0,#31
000050  0fc0              LSRS     r0,r0,#31
000052  2800              CMP      r0,#0
000054  d100              BNE      |L1.88|
;;;115          break;
000056  e004              B        |L1.98|
                  |L1.88|
000058  1c49              ADDS     r1,r1,#1              ;113
                  |L1.90|
00005a  2005              MOVS     r0,#5                 ;113
00005c  0400              LSLS     r0,r0,#16             ;113
00005e  4281              CMP      r1,r0                 ;113
000060  d3f3              BCC      |L1.74|
                  |L1.98|
000062  46c0              MOV      r8,r8
;;;116        }
;;;117      }
;;;118      MAC_MCMD = 0;
000064  2000              MOVS     r0,#0
000066  4be7              LDR      r3,|L1.1028|
000068  6258              STR      r0,[r3,#0x24]
;;;119      return (MAC_MRDD);
00006a  0018              MOVS     r0,r3
00006c  6b00              LDR      r0,[r0,#0x30]
00006e  0400              LSLS     r0,r0,#16
000070  0c00              LSRS     r0,r0,#16
;;;120    }
000072  4770              BX       lr
;;;121    
                          ENDP

                  ReadFrame_EMAC PROC
;;;122    unsigned short ReadFrame_EMAC(void)
000074  48e4              LDR      r0,|L1.1032|
;;;123    {
;;;124      return (*rxptr++);
000076  6800              LDR      r0,[r0,#0]  ; rxptr
000078  8800              LDRH     r0,[r0,#0]
00007a  49e3              LDR      r1,|L1.1032|
00007c  6809              LDR      r1,[r1,#0]  ; rxptr
00007e  1c89              ADDS     r1,r1,#2
000080  4ae1              LDR      r2,|L1.1032|
000082  6011              STR      r1,[r2,#0]  ; rxptr
;;;125    }
000084  4770              BX       lr
;;;126    
                          ENDP

                  CopyFromFrame_EMAC PROC
;;;127    void CopyFromFrame_EMAC(void *Dest, unsigned short Size) {
000086  b530              PUSH     {r4,r5,lr}
000088  0005              MOVS     r5,r0
00008a  000b              MOVS     r3,r1
;;;128      unsigned short * piDest;                       
;;;129    
;;;130      piDest = Dest;                                 
00008c  002c              MOVS     r4,r5
;;;131      while (Size > 1) {
00008e  e006              B        |L1.158|
                  |L1.144|
;;;132        *piDest++ = ReadFrame_EMAC();
000090  f7fffffe          BL       ReadFrame_EMAC
000094  8020              STRH     r0,[r4,#0]
000096  1ca4              ADDS     r4,r4,#2
;;;133        Size -= 2;
000098  1e98              SUBS     r0,r3,#2
00009a  0403              LSLS     r3,r0,#16
00009c  0c1b              LSRS     r3,r3,#16
                  |L1.158|
00009e  2b01              CMP      r3,#1                 ;131
0000a0  dcf6              BGT      |L1.144|
;;;134      } 
;;;135      if (Size) {                                         
0000a2  2b00              CMP      r3,#0
0000a4  d002              BEQ      |L1.172|
;;;136        *(unsigned char *)piDest = (char)ReadFrame_EMAC();
0000a6  f7fffffe          BL       ReadFrame_EMAC
0000aa  7020              STRB     r0,[r4,#0]
                  |L1.172|
;;;137      }                                                   
;;;138    }
0000ac  bc30              POP      {r4,r5}
0000ae  bc08              POP      {r3}
0000b0  4718              BX       r3
;;;139    
                          ENDP

                  same_mac PROC
;;;140    int same_mac(char * mac1,char * mac2) {
0000b2  b410              PUSH     {r4}
0000b4  0002              MOVS     r2,r0
0000b6  000b              MOVS     r3,r1
;;;141      int i;
;;;142      
;;;143      for(i=0; i<6; i++) {
0000b8  2100              MOVS     r1,#0
0000ba  e007              B        |L1.204|
                  |L1.188|
;;;144        if(mac1[i] != mac2[i])
0000bc  5c50              LDRB     r0,[r2,r1]
0000be  5c5c              LDRB     r4,[r3,r1]
0000c0  42a0              CMP      r0,r4
0000c2  d002              BEQ      |L1.202|
;;;145    	  return false;
0000c4  2000              MOVS     r0,#0
                  |L1.198|
;;;146      }
;;;147      return true;
;;;148    }
0000c6  bc10              POP      {r4}
0000c8  4770              BX       lr
                  |L1.202|
0000ca  1c49              ADDS     r1,r1,#1              ;143
                  |L1.204|
0000cc  2906              CMP      r1,#6                 ;143
0000ce  dbf5              BLT      |L1.188|
0000d0  2001              MOVS     r0,#1                 ;147
0000d2  e7f8              B        |L1.198|
;;;149    
                          ENDP

                  filter_pass PROC
;;;150    int filter_pass(void) {
0000d4  b500              PUSH     {lr}
;;;151    
;;;152       if (!synchro)
0000d6  48cd              LDR      r0,|L1.1036|
0000d8  7800              LDRB     r0,[r0,#0]  ; synchro
0000da  2800              CMP      r0,#0
0000dc  d102              BNE      |L1.228|
;;;153         return true;
0000de  2001              MOVS     r0,#1
                  |L1.224|
;;;154    
;;;155       if(! same_mac(FRAMEr->source,HostMAC)) {
;;;156    #if ETHERNET_DEBUG
;;;157    	 print("Frame from different MAC: Filtered out!\n");
;;;158    #endif   	
;;;159         return false;
;;;160       }
;;;161       if(PACKETr->destport != DestPort) {
;;;162    #if ETHERNET_DEBUG
;;;163    	 print("Packet from different Destination Port: Filtered out!\n");
;;;164    #endif 
;;;165         return false;
;;;166       }
;;;167       if(PACKETr->srcport != SrcPort) {
;;;168    #if ETHERNET_DEBUG
;;;169    	 print("Packet to different Source Port: Filtered out!\n");
;;;170    #endif 
;;;171         return false;
;;;172       }
;;;173       return true;
;;;174    }
0000e0  bc08              POP      {r3}
0000e2  4718              BX       r3
                  |L1.228|
0000e4  49ca              LDR      r1,|L1.1040|
0000e6  48cb              LDR      r0,|L1.1044|
0000e8  f7fffffe          BL       same_mac
0000ec  2800              CMP      r0,#0                 ;155
0000ee  d100              BNE      |L1.242|
0000f0  e7f6              B        |L1.224|
                  |L1.242|
0000f2  48c8              LDR      r0,|L1.1044|
0000f4  1f80              SUBS     r0,r0,#6              ;161
0000f6  8c80              LDRH     r0,[r0,#0x24]         ;161
0000f8  49c7              LDR      r1,|L1.1048|
0000fa  8809              LDRH     r1,[r1,#0]            ;161  ; DestPort
0000fc  4288              CMP      r0,r1                 ;161
0000fe  d001              BEQ      |L1.260|
000100  2000              MOVS     r0,#0                 ;165
000102  e7ed              B        |L1.224|
                  |L1.260|
000104  48c3              LDR      r0,|L1.1044|
000106  1f80              SUBS     r0,r0,#6              ;167
000108  8c40              LDRH     r0,[r0,#0x22]         ;167
00010a  49c4              LDR      r1,|L1.1052|
00010c  8809              LDRH     r1,[r1,#0]            ;167  ; SrcPort
00010e  4288              CMP      r0,r1                 ;167
000110  d001              BEQ      |L1.278|
000112  2000              MOVS     r0,#0                 ;171
000114  e7e4              B        |L1.224|
                  |L1.278|
000116  2001              MOVS     r0,#1                 ;173
000118  e7e2              B        |L1.224|
;;;175    
                          ENDP

                  WriteFrame_EMAC PROC
;;;176    void WriteFrame_EMAC(unsigned short Data)
00011a  49c1              LDR      r1,|L1.1056|
;;;177    {
;;;178      *txptr++ = Data;
00011c  6809              LDR      r1,[r1,#0]  ; txptr
00011e  8008              STRH     r0,[r1,#0]
000120  49bf              LDR      r1,|L1.1056|
000122  6809              LDR      r1,[r1,#0]  ; txptr
000124  1c89              ADDS     r1,r1,#2
000126  4abe              LDR      r2,|L1.1056|
000128  6011              STR      r1,[r2,#0]  ; txptr
;;;179    }
00012a  4770              BX       lr
;;;180    
                          ENDP

                  CopyToFrame_EMAC PROC
;;;181    void CopyToFrame_EMAC(void *Source, unsigned int Size)
00012c  b530              PUSH     {r4,r5,lr}
;;;182    {
00012e  0004              MOVS     r4,r0
000130  000b              MOVS     r3,r1
;;;183      unsigned short * piSource;
;;;184    
;;;185      piSource = Source;
000132  0025              MOVS     r5,r4
;;;186      Size = (Size + 1) & 0xFFFE;    
000134  1c58              ADDS     r0,r3,#1
000136  49bb              LDR      r1,|L1.1060|
000138  4008              ANDS     r0,r0,r1
00013a  0003              MOVS     r3,r0
;;;187      while (Size > 0) {
00013c  e004              B        |L1.328|
                  |L1.318|
;;;188        WriteFrame_EMAC(*piSource++);
00013e  8828              LDRH     r0,[r5,#0]
000140  1cad              ADDS     r5,r5,#2
000142  f7fffffe          BL       WriteFrame_EMAC
;;;189        Size -= 2;
000146  1e9b              SUBS     r3,r3,#2
                  |L1.328|
000148  2b00              CMP      r3,#0                 ;187
00014a  d1f8              BNE      |L1.318|
;;;190      }
;;;191    }
00014c  bc30              POP      {r4,r5}
00014e  bc08              POP      {r3}
000150  4718              BX       r3
;;;192    
                          ENDP

                  chksum16 PROC
;;;193    int chksum16(void *buf1, short len) {
000152  b470              PUSH     {r4-r6}
000154  0004              MOVS     r4,r0
;;;194      unsigned short * buf = buf1;
000156  0023              MOVS     r3,r4
;;;195      int chksum16, chksum=0;
000158  2200              MOVS     r2,#0
;;;196    
;;;197      while(len > 0) {	
00015a  e010              B        |L1.382|
                  |L1.348|
;;;198        if (len == 1)
00015c  2901              CMP      r1,#1
00015e  d101              BNE      |L1.356|
;;;199          chksum16 = ((*buf)&0x00FF);
000160  781d              LDRB     r5,[r3,#0]
000162  e000              B        |L1.358|
                  |L1.356|
;;;200        else
;;;201          chksum16 = (*buf);
000164  881d              LDRH     r5,[r3,#0]
                  |L1.358|
;;;202        chksum = chksum + HTONS(chksum16);
000166  0628              LSLS     r0,r5,#24
000168  0c00              LSRS     r0,r0,#16
00016a  26ff              MOVS     r6,#0xff
00016c  0236              LSLS     r6,r6,#8
00016e  402e              ANDS     r6,r6,r5
000170  1236              ASRS     r6,r6,#8
000172  4330              ORRS     r0,r0,r6
000174  1882              ADDS     r2,r0,r2
;;;203        *buf++;
000176  1c9b              ADDS     r3,r3,#2
;;;204        len -=2;
000178  1e88              SUBS     r0,r1,#2
00017a  0400              LSLS     r0,r0,#16
00017c  1401              ASRS     r1,r0,#16
                  |L1.382|
00017e  2900              CMP      r1,#0                 ;197
000180  dcec              BGT      |L1.348|
;;;205      }
;;;206      return (~(chksum + ((chksum & 0xFFFF0000) >> 16))&0xFFFF);
000182  0c10              LSRS     r0,r2,#16
000184  1880              ADDS     r0,r0,r2
000186  43c0              MVNS     r0,r0
000188  0400              LSLS     r0,r0,#16
00018a  0c00              LSRS     r0,r0,#16
;;;207    }
00018c  bc70              POP      {r4-r6}
00018e  4770              BX       lr
;;;208    
                          ENDP

                  init_emac PROC
;;;211    //*****************************************************//
;;;212    void init_emac(void)  {
000190  b5f8              PUSH     {r3-r7,lr}
;;;213      unsigned int regv,tout,id1,id2,i;
;;;214    
;;;215      synchro = false;
000192  2000              MOVS     r0,#0
000194  499d              LDR      r1,|L1.1036|
000196  7008              STRB     r0,[r1,#0]
;;;216    
;;;217    #if ETHERNET_DEBUG
;;;218      UART_init(57600);
;;;219      print("Ethernet Secondary Bootloader: Target in debug mode\n");
;;;220    #endif 
;;;221    
;;;222       /* Power Up the EMAC controller. */
;;;223      PCONP |= 0x40000000;
000198  48a3              LDR      r0,|L1.1064|
00019a  6840              LDR      r0,[r0,#4]
00019c  2101              MOVS     r1,#1
00019e  0789              LSLS     r1,r1,#30
0001a0  4308              ORRS     r0,r0,r1
0001a2  49a1              LDR      r1,|L1.1064|
0001a4  6048              STR      r0,[r1,#4]
;;;224      
;;;225      /* Enable P1 Ethernet Pins. */
;;;226      if (MAC_MODULEID == OLD_EMAC_MODULE_ID) { 
0001a6  48a1              LDR      r0,|L1.1068|
0001a8  6bc0              LDR      r0,[r0,#0x3c]
0001aa  49a1              LDR      r1,|L1.1072|
0001ac  4288              CMP      r0,r1
0001ae  d103              BNE      |L1.440|
;;;227        /* For the first silicon rev.'-' ID P1.6 should be set. */
;;;228        PINSEL2 = 0x50151105;
0001b0  48a0              LDR      r0,|L1.1076|
0001b2  49a1              LDR      r1,|L1.1080|
0001b4  6088              STR      r0,[r1,#8]
0001b6  e002              B        |L1.446|
                  |L1.440|
;;;229      }
;;;230      else {
;;;231        /* on rev. 'A' and later, P1.6 should NOT be set. */
;;;232        PINSEL2 = 0x50150105;
0001b8  48a0              LDR      r0,|L1.1084|
0001ba  499f              LDR      r1,|L1.1080|
0001bc  6088              STR      r0,[r1,#8]
                  |L1.446|
;;;233      }
;;;234      PINSEL3 = (PINSEL3 & ~0x0000000F) | 0x00000005;
0001be  489e              LDR      r0,|L1.1080|
0001c0  68c0              LDR      r0,[r0,#0xc]
0001c2  0900              LSRS     r0,r0,#4
0001c4  0100              LSLS     r0,r0,#4
0001c6  1d40              ADDS     r0,r0,#5
0001c8  499b              LDR      r1,|L1.1080|
0001ca  60c8              STR      r0,[r1,#0xc]
;;;235     
;;;236      /* Reset all EMAC internal modules. */
;;;237      MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX |
0001cc  20cf              MOVS     r0,#0xcf
0001ce  0200              LSLS     r0,r0,#8
0001d0  498c              LDR      r1,|L1.1028|
0001d2  6008              STR      r0,[r1,#0]
;;;238                 MAC1_SIM_RES | MAC1_SOFT_RES;
;;;239      MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES;
0001d4  2038              MOVS     r0,#0x38
0001d6  499a              LDR      r1,|L1.1088|
0001d8  6008              STR      r0,[r1,#0]
;;;240    
;;;241      /* A short delay after reset. */
;;;242      for (tout = 100; tout; tout--);
0001da  2564              MOVS     r5,#0x64
0001dc  e000              B        |L1.480|
                  |L1.478|
0001de  1e6d              SUBS     r5,r5,#1
                  |L1.480|
0001e0  2d00              CMP      r5,#0
0001e2  d1fc              BNE      |L1.478|
;;;243    
;;;244      /* Initialize MAC control registers. */
;;;245      MAC_MAC1 = MAC1_PASS_ALL;
0001e4  2002              MOVS     r0,#2
0001e6  4987              LDR      r1,|L1.1028|
0001e8  6008              STR      r0,[r1,#0]
;;;246      MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN;
0001ea  2030              MOVS     r0,#0x30
0001ec  6048              STR      r0,[r1,#4]
;;;247      MAC_MAXF = ETH_MAX_FLEN;
0001ee  4895              LDR      r0,|L1.1092|
0001f0  6148              STR      r0,[r1,#0x14]
;;;248      MAC_CLRT = CLRT_DEF;
0001f2  4895              LDR      r0,|L1.1096|
0001f4  6108              STR      r0,[r1,#0x10]
;;;249      MAC_IPGR = IPGR_DEF;
0001f6  2012              MOVS     r0,#0x12
0001f8  60c8              STR      r0,[r1,#0xc]
;;;250    
;;;251      /* Enable Reduced MII interface. */
;;;252      MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM;
0001fa  0140              LSLS     r0,r0,#5
0001fc  4990              LDR      r1,|L1.1088|
0001fe  6008              STR      r0,[r1,#0]
;;;253    
;;;254      /* Put the PHY chip in reset mode */
;;;255      write_PHY (PHY_REG_BMCR, 0x8000);
000200  2101              MOVS     r1,#1
000202  03c9              LSLS     r1,r1,#15
000204  2000              MOVS     r0,#0
000206  f7fffffe          BL       write_PHY
;;;256    
;;;257      /* Wait for hardware reset to end. */
;;;258      for (tout = 0; tout < 0x100000; tout++) {
00020a  46c0              MOV      r8,r8
00020c  e00a              B        |L1.548|
                  |L1.526|
;;;259        regv = read_PHY (PHY_REG_BMCR);
00020e  2000              MOVS     r0,#0
000210  f7fffffe          BL       read_PHY
000214  0006              MOVS     r6,r0
;;;260        if (!(regv & 0x8000)) {
000216  2001              MOVS     r0,#1
000218  03c0              LSLS     r0,r0,#15
00021a  4030              ANDS     r0,r0,r6
00021c  2800              CMP      r0,#0
00021e  d100              BNE      |L1.546|
;;;261          /* Reset complete */
;;;262          break;
000220  e004              B        |L1.556|
                  |L1.546|
000222  1c6d              ADDS     r5,r5,#1              ;258
                  |L1.548|
000224  2001              MOVS     r0,#1                 ;258
000226  0500              LSLS     r0,r0,#20             ;258
000228  4285              CMP      r5,r0                 ;258
00022a  d3f0              BCC      |L1.526|
                  |L1.556|
00022c  46c0              MOV      r8,r8
;;;263        }
;;;264      }
;;;265     
;;;266      /* MII Mgmt Configuration register and MII Mgnt hardware Reset       */
;;;267      /* host clock divided by 20, no suppress preamble, no scan increment */
;;;268      MAC_MCFG = HOST_CLK_BY_20 | MCFG_RES_MII;	
00022e  4887              LDR      r0,|L1.1100|
000230  4974              LDR      r1,|L1.1028|
000232  6208              STR      r0,[r1,#0x20]
;;;269      for ( i = 0; i < 0x40; i++ );
000234  2400              MOVS     r4,#0
000236  e000              B        |L1.570|
                  |L1.568|
000238  1c64              ADDS     r4,r4,#1
                  |L1.570|
00023a  2c40              CMP      r4,#0x40
00023c  d3fc              BCC      |L1.568|
;;;270      MAC_MCFG &= (~MCFG_RES_MII);	/* Clear the reset */
00023e  4871              LDR      r0,|L1.1028|
000240  6a00              LDR      r0,[r0,#0x20]
000242  2101              MOVS     r1,#1
000244  03c9              LSLS     r1,r1,#15
000246  4388              BICS     r0,r0,r1
000248  496e              LDR      r1,|L1.1028|
00024a  6208              STR      r0,[r1,#0x20]
;;;271      MAC_MCMD = 0;	
00024c  2000              MOVS     r0,#0
00024e  6248              STR      r0,[r1,#0x24]
;;;272    
;;;273    #if(PHY_CHIP==0)  //National PHY
;;;274      /* Check if this is a DP83848C PHY. */
;;;275      id1 = read_PHY (PHY_REG_IDR1);
000250  2002              MOVS     r0,#2
000252  f7fffffe          BL       read_PHY
000256  9000              STR      r0,[sp,#0]
;;;276      id2 = read_PHY (PHY_REG_IDR2);
000258  2003              MOVS     r0,#3
00025a  f7fffffe          BL       read_PHY
00025e  0007              MOVS     r7,r0
;;;277      if (((id1 << 16) | (id2 & 0xFFF0)) == DP83848C_ID) {
000260  9800              LDR      r0,[sp,#0]
000262  0400              LSLS     r0,r0,#16
000264  496f              LDR      r1,|L1.1060|
000266  390e              SUBS     r1,r1,#0xe
000268  4039              ANDS     r1,r1,r7
00026a  4308              ORRS     r0,r0,r1
00026c  4978              LDR      r1,|L1.1104|
00026e  4288              CMP      r0,r1
000270  d115              BNE      |L1.670|
;;;278        /* Configure the PHY device */
;;;279    
;;;280        /* Use autonegotiation about the link speed. */
;;;281        write_PHY (PHY_REG_BMCR, PHY_AUTO_NEG);
000272  2103              MOVS     r1,#3
000274  0309              LSLS     r1,r1,#12
000276  2000              MOVS     r0,#0
000278  f7fffffe          BL       write_PHY
;;;282        /* Wait to complete Auto_Negotiation. */
;;;283        for (tout = 0; tout < 0x100000; tout++) {
00027c  2500              MOVS     r5,#0
00027e  e009              B        |L1.660|
                  |L1.640|
;;;284          regv = read_PHY (PHY_REG_BMSR);
000280  2001              MOVS     r0,#1
000282  f7fffffe          BL       read_PHY
000286  0006              MOVS     r6,r0
;;;285          if (regv & 0x0020) {
000288  2020              MOVS     r0,#0x20
00028a  4030              ANDS     r0,r0,r6
00028c  2800              CMP      r0,#0
00028e  d000              BEQ      |L1.658|
;;;286            /* Autonegotiation Complete. */
;;;287            break;
000290  e004              B        |L1.668|
                  |L1.658|
000292  1c6d              ADDS     r5,r5,#1              ;283
                  |L1.660|
000294  2001              MOVS     r0,#1                 ;283
000296  0500              LSLS     r0,r0,#20             ;283
000298  4285              CMP      r5,r0                 ;283
00029a  d3f1              BCC      |L1.640|
                  |L1.668|
00029c  46c0              MOV      r8,r8
                  |L1.670|
;;;288          }
;;;289        }
;;;290      }
;;;291      
;;;292      /* Check the link status. */
;;;293      for (tout = 0; tout < 0x10000; tout++) {
00029e  2500              MOVS     r5,#0
0002a0  e009              B        |L1.694|
                  |L1.674|
;;;294        regv = read_PHY (PHY_REG_STS);
0002a2  2010              MOVS     r0,#0x10
0002a4  f7fffffe          BL       read_PHY
0002a8  0006              MOVS     r6,r0
;;;295        if (regv & 0x0001) {
0002aa  07f0              LSLS     r0,r6,#31
0002ac  0fc0              LSRS     r0,r0,#31
0002ae  2800              CMP      r0,#0
0002b0  d000              BEQ      |L1.692|
;;;296          /* Link is on. */
;;;297          break;
0002b2  e004              B        |L1.702|
                  |L1.692|
0002b4  1c6d              ADDS     r5,r5,#1              ;293
                  |L1.694|
0002b6  2001              MOVS     r0,#1                 ;293
0002b8  0400              LSLS     r0,r0,#16             ;293
0002ba  4285              CMP      r5,r0                 ;293
0002bc  d3f1              BCC      |L1.674|
                  |L1.702|
0002be  46c0              MOV      r8,r8
;;;298        }
;;;299      }
;;;300    
;;;301      /* Configure Full/Half Duplex mode. */
;;;302      if (regv & 0x0004) {
0002c0  2004              MOVS     r0,#4
0002c2  4030              ANDS     r0,r0,r6
0002c4  2800              CMP      r0,#0
0002c6  d010              BEQ      |L1.746|
;;;303        /* Full duplex is enabled. */
;;;304        MAC_MAC2    |= MAC2_FULL_DUP;
0002c8  484e              LDR      r0,|L1.1028|
0002ca  6840              LDR      r0,[r0,#4]
0002cc  2101              MOVS     r1,#1
0002ce  4308              ORRS     r0,r0,r1
0002d0  494c              LDR      r1,|L1.1028|
0002d2  6048              STR      r0,[r1,#4]
;;;305        MAC_COMMAND |= CR_FULL_DUP;
0002d4  485a              LDR      r0,|L1.1088|
0002d6  6800              LDR      r0,[r0,#0]
0002d8  2101              MOVS     r1,#1
0002da  0289              LSLS     r1,r1,#10
0002dc  4308              ORRS     r0,r0,r1
0002de  4958              LDR      r1,|L1.1088|
0002e0  6008              STR      r0,[r1,#0]
;;;306        MAC_IPGT     = IPGT_FULL_DUP;
0002e2  2015              MOVS     r0,#0x15
0002e4  4947              LDR      r1,|L1.1028|
0002e6  6088              STR      r0,[r1,#8]
0002e8  e002              B        |L1.752|
                  |L1.746|
;;;307      }
;;;308      else {
;;;309        /* Half duplex mode. */
;;;310        MAC_IPGT = IPGT_HALF_DUP;
0002ea  2012              MOVS     r0,#0x12
0002ec  4945              LDR      r1,|L1.1028|
0002ee  6088              STR      r0,[r1,#8]
                  |L1.752|
;;;311      }
;;;312    
;;;313      /* Configure 100MBit/10MBit mode. */
;;;314      if (regv & 0x0002) {
0002f0  2002              MOVS     r0,#2
0002f2  4030              ANDS     r0,r0,r6
0002f4  2800              CMP      r0,#0
0002f6  d003              BEQ      |L1.768|
;;;315        /* 10MBit mode. */
;;;316        MAC_SUPP = 0;
0002f8  2000              MOVS     r0,#0
0002fa  4942              LDR      r1,|L1.1028|
0002fc  6188              STR      r0,[r1,#0x18]
0002fe  e003              B        |L1.776|
                  |L1.768|
;;;317      }
;;;318      else {
;;;319        /* 100MBit mode. */
;;;320        MAC_SUPP = SUPP_SPEED;
000300  20ff              MOVS     r0,#0xff
000302  3001              ADDS     r0,#1
000304  493f              LDR      r1,|L1.1028|
000306  6188              STR      r0,[r1,#0x18]
                  |L1.776|
;;;321      }
;;;322    #endif
;;;323    
;;;324    #if(PHY_CHIP==1)  //Other PHY
;;;325      /* Initialization code for other PHY */
;;;326    
;;;327    
;;;328    #endif
;;;329    
;;;330      /* Set the Ethernet MAC Address registers */
;;;331      MAC_SA0 = (MYMAC_1 << 8) | MYMAC_2;
000308  4852              LDR      r0,|L1.1108|
00030a  493e              LDR      r1,|L1.1028|
00030c  3140              ADDS     r1,r1,#0x40
00030e  6008              STR      r0,[r1,#0]
;;;332      MAC_SA1 = (MYMAC_3 << 8) | MYMAC_4;
000310  4851              LDR      r0,|L1.1112|
000312  6048              STR      r0,[r1,#4]
;;;333      MAC_SA2 = (MYMAC_5 << 8) | MYMAC_6;
000314  4851              LDR      r0,|L1.1116|
000316  6088              STR      r0,[r1,#8]
;;;334    
;;;335      /* save the Ethernet MAC Address to MyMAC[] */
;;;336      MyMAC[0] = MYMAC_6;
000318  200c              MOVS     r0,#0xc
00031a  4951              LDR      r1,|L1.1120|
00031c  7008              STRB     r0,[r1,#0]
;;;337      MyMAC[1] = MYMAC_5;
00031e  201d              MOVS     r0,#0x1d
000320  7048              STRB     r0,[r1,#1]
;;;338      MyMAC[2] = MYMAC_4;
000322  2012              MOVS     r0,#0x12
000324  7088              STRB     r0,[r1,#2]
;;;339      MyMAC[3] = MYMAC_3;
000326  20e0              MOVS     r0,#0xe0
000328  70c8              STRB     r0,[r1,#3]
;;;340      MyMAC[4] = MYMAC_2;
00032a  201f              MOVS     r0,#0x1f
00032c  7108              STRB     r0,[r1,#4]
;;;341      MyMAC[5] = MYMAC_1;
00032e  2010              MOVS     r0,#0x10
000330  7148              STRB     r0,[r1,#5]
;;;342    
;;;343      /* Initialize Rx DMA Descriptors */
;;;344      for (i = 0; i < NUM_RX_FRAG; i++) {
000332  2400              MOVS     r4,#0
000334  e015              B        |L1.866|
                  |L1.822|
;;;345        RX_DESC_PACKET(i)  = RX_BUF(i);
000336  2078              MOVS     r0,#0x78
000338  4360              MULS     r0,r4,r0
00033a  494a              LDR      r1,|L1.1124|
00033c  1840              ADDS     r0,r0,r1
00033e  00e1              LSLS     r1,r4,#3
000340  4a49              LDR      r2,|L1.1128|
000342  1889              ADDS     r1,r1,r2
000344  6008              STR      r0,[r1,#0]
;;;346        RX_DESC_CTRL(i)    = RCTRL_INT | (ETH_FRAG_SIZE-1);
000346  4849              LDR      r0,|L1.1132|
000348  00e1              LSLS     r1,r4,#3
00034a  1889              ADDS     r1,r1,r2
00034c  6048              STR      r0,[r1,#4]
;;;347        RX_STAT_INFO(i)    = 0;
00034e  2000              MOVS     r0,#0
000350  00e1              LSLS     r1,r4,#3
000352  4a45              LDR      r2,|L1.1128|
000354  3280              ADDS     r2,r2,#0x80
000356  1889              ADDS     r1,r1,r2
000358  6488              STR      r0,[r1,#0x48]
;;;348        RX_STAT_HASHCRC(i) = 0;
00035a  00e1              LSLS     r1,r4,#3
00035c  1889              ADDS     r1,r1,r2
00035e  64c8              STR      r0,[r1,#0x4c]
000360  1c64              ADDS     r4,r4,#1              ;344
                  |L1.866|
000362  2c19              CMP      r4,#0x19              ;344
000364  d3e7              BCC      |L1.822|
;;;349      }
;;;350      /* Set EMAC Receive Descriptor Registers. */
;;;351      MAC_RXDESCRIPTOR    = RX_DESC_BASE;
000366  4840              LDR      r0,|L1.1128|
000368  4935              LDR      r1,|L1.1088|
00036a  6088              STR      r0,[r1,#8]
;;;352      MAC_RXSTATUS        = RX_STAT_BASE;
00036c  483e              LDR      r0,|L1.1128|
00036e  30c8              ADDS     r0,r0,#0xc8
000370  60c8              STR      r0,[r1,#0xc]
;;;353      MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1;
000372  2018              MOVS     r0,#0x18
000374  6108              STR      r0,[r1,#0x10]
;;;354      /* Rx Descriptors Point to 0 */
;;;355      MAC_RXCONSUMEINDEX  = 0;
000376  2000              MOVS     r0,#0
000378  6188              STR      r0,[r1,#0x18]
;;;356    
;;;357      /* Initialize Tx DMA Descriptors */
;;;358      for (i = 0; i < NUM_TX_FRAG; i++) {
00037a  2400              MOVS     r4,#0
00037c  e010              B        |L1.928|
                  |L1.894|
;;;359        TX_DESC_PACKET(i) = TX_BUF(i);
00037e  2078              MOVS     r0,#0x78
000380  4360              MULS     r0,r4,r0
000382  493b              LDR      r1,|L1.1136|
000384  1840              ADDS     r0,r0,r1
000386  00e1              LSLS     r1,r4,#3
000388  4a36              LDR      r2,|L1.1124|
00038a  3a34              SUBS     r2,r2,#0x34
00038c  1889              ADDS     r1,r1,r2
00038e  6108              STR      r0,[r1,#0x10]
;;;360        TX_DESC_CTRL(i)   = 0;
000390  2000              MOVS     r0,#0
000392  00e1              LSLS     r1,r4,#3
000394  1889              ADDS     r1,r1,r2
000396  6148              STR      r0,[r1,#0x14]
;;;361        TX_STAT_INFO(i)   = 0;
000398  00a1              LSLS     r1,r4,#2
00039a  1889              ADDS     r1,r1,r2
00039c  6288              STR      r0,[r1,#0x28]
00039e  1c64              ADDS     r4,r4,#1              ;358
                  |L1.928|
0003a0  2c03              CMP      r4,#3                 ;358
0003a2  d3ec              BCC      |L1.894|
;;;362      }
;;;363      /* Set EMAC Transmit Descriptor Registers. */
;;;364      MAC_TXDESCRIPTOR    = TX_DESC_BASE;
0003a4  482f              LDR      r0,|L1.1124|
0003a6  3824              SUBS     r0,r0,#0x24
0003a8  4925              LDR      r1,|L1.1088|
0003aa  61c8              STR      r0,[r1,#0x1c]
;;;365      MAC_TXSTATUS        = TX_STAT_BASE;
0003ac  482d              LDR      r0,|L1.1124|
0003ae  380c              SUBS     r0,r0,#0xc
0003b0  6208              STR      r0,[r1,#0x20]
;;;366      MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1;
0003b2  2002              MOVS     r0,#2
0003b4  6248              STR      r0,[r1,#0x24]
;;;367      /* Tx Descriptors Point to 0 */
;;;368      MAC_TXPRODUCEINDEX  = 0;
0003b6  2000              MOVS     r0,#0
0003b8  6288              STR      r0,[r1,#0x28]
;;;369    
;;;370      /* Receive Broadcast and Perfect Match Packets */
;;;371      MAC_RXFILTERCTRL = RFC_PERFECT_EN;  
0003ba  2020              MOVS     r0,#0x20
0003bc  492d              LDR      r1,|L1.1140|
0003be  6008              STR      r0,[r1,#0]
;;;372    
;;;373      /* Enable EMAC interrupts. */
;;;374      MAC_INTENABLE = INT_RX_DONE | INT_TX_DONE;
0003c0  2088              MOVS     r0,#0x88
0003c2  491a              LDR      r1,|L1.1068|
0003c4  6248              STR      r0,[r1,#0x24]
;;;375    
;;;376      /* Reset all interrupts */
;;;377      MAC_INTCLEAR  = 0xFFFF;
0003c6  4817              LDR      r0,|L1.1060|
0003c8  1c40              ADDS     r0,r0,#1
0003ca  6288              STR      r0,[r1,#0x28]
;;;378    
;;;379      /* Enable receive and transmit mode of MAC Ethernet core */
;;;380      MAC_COMMAND  |= (CR_RX_EN | CR_TX_EN);
0003cc  481c              LDR      r0,|L1.1088|
0003ce  6800              LDR      r0,[r0,#0]
0003d0  2103              MOVS     r1,#3
0003d2  4308              ORRS     r0,r0,r1
0003d4  491a              LDR      r1,|L1.1088|
0003d6  6008              STR      r0,[r1,#0]
;;;381      MAC_MAC1     |= MAC1_REC_EN;
0003d8  480a              LDR      r0,|L1.1028|
0003da  6800              LDR      r0,[r0,#0]
0003dc  2101              MOVS     r1,#1
0003de  4308              ORRS     r0,r0,r1
0003e0  4908              LDR      r1,|L1.1028|
0003e2  6008              STR      r0,[r1,#0]
;;;382    
;;;383      /* Complete some IP & UDP header values */
;;;384      txbuffer[12] = 0x08;
0003e4  2008              MOVS     r0,#8
0003e6  4924              LDR      r1,|L1.1144|
0003e8  7308              STRB     r0,[r1,#0xc]
;;;385      txbuffer[13] = 0x00;
0003ea  2000              MOVS     r0,#0
0003ec  7348              STRB     r0,[r1,#0xd]
;;;386      txbuffer[14] = 0x45;
0003ee  2045              MOVS     r0,#0x45
0003f0  7388              STRB     r0,[r1,#0xe]
;;;387      txbuffer[15] = 0x00;
0003f2  2000              MOVS     r0,#0
0003f4  73c8              STRB     r0,[r1,#0xf]
;;;388      txbuffer[18] = 0xD8;
0003f6  20d8              MOVS     r0,#0xd8
0003f8  7488              STRB     r0,[r1,#0x12]
;;;389      txbuffer[19] = 0xF4;
0003fa  20f4              MOVS     r0,#0xf4
0003fc  74c8              STRB     r0,[r1,#0x13]
;;;390      txbuffer[20] = 0x00;
0003fe  2000              MOVS     r0,#0
000400  7508              STRB     r0,[r1,#0x14]
;;;391      txbuffer[21] = 0x00;
000402  e03b              B        |L1.1148|
                  |L1.1028|
                          DCD      0xffe00000
                  |L1.1032|
                          DCD      rxptr
                  |L1.1036|
                          DCD      synchro
                  |L1.1040|
                          DCD      HostMAC
                  |L1.1044|
                          DCD      rxbuffer+0x6
                  |L1.1048|
                          DCD      DestPort
                  |L1.1052|
                          DCD      SrcPort
                  |L1.1056|
                          DCD      txptr
                  |L1.1060|
                          DCD      0x0000fffe
                  |L1.1064|
                          DCD      0xe01fc0c0
                  |L1.1068|
                          DCD      0xffe00fc0
                  |L1.1072|
                          DCD      0x39022000
                  |L1.1076|
                          DCD      0x50151105
                  |L1.1080|
                          DCD      0xe002c000
                  |L1.1084|
                          DCD      0x50150105
                  |L1.1088|
                          DCD      0xffe00100
                  |L1.1092|
                          DCD      0x000005f2
                  |L1.1096|
                          DCD      0x0000370f
                  |L1.1100|
                          DCD      0x00008018
                  |L1.1104|
                          DCD      0x20005c90
                  |L1.1108|
                          DCD      0x0000101f
                  |L1.1112|
                          DCD      0x0000e012
                  |L1.1116|
                          DCD      0x00001d0c
                  |L1.1120|
                          DCD      MyMAC
                  |L1.1124|
                          DCD      0x7fe001b4
                  |L1.1128|
                          DCD      0x7fe00000
                  |L1.1132|
                          DCD      0x80000077
                  |L1.1136|
                          DCD      0x7fe00d6c
                  |L1.1140|
                          DCD      0xffe00200
                  |L1.1144|
                          DCD      txbuffer
                  |L1.1148|
00047c  7548              STRB     r0,[r1,#0x15]
;;;392      txbuffer[22] = 0x80;
00047e  2080              MOVS     r0,#0x80
000480  7588              STRB     r0,[r1,#0x16]
;;;393      txbuffer[23] = 0x11;
000482  2011              MOVS     r0,#0x11
000484  75c8              STRB     r0,[r1,#0x17]
;;;394    }
000486  bcf8              POP      {r3-r7}
000488  bc08              POP      {r3}
00048a  4718              BX       r3
;;;395    
                          ENDP

                  emac_getline PROC
;;;397    // returns 0 if packet received, 1 if timeout
;;;398    unsigned emac_getline(char * buf,int max_len,int * count) {
00048c  b5f7              PUSH     {r0-r2,r4-r7,lr}
00048e  b082              SUB      sp,sp,#8
000490  000e              MOVS     r6,r1
;;;399      unsigned short RxLen;
;;;400      unsigned int idx, i;
;;;401    
;;;402    #if ETHERNET_DEBUG
;;;403      int j;
;;;404    #endif
;;;405    
;;;406    #if LED_ENABLED
;;;407      int k=0;
000492  2000              MOVS     r0,#0
000494  9001              STR      r0,[sp,#4]
;;;408    #endif
;;;409     
;;;410      /* get timestamp for end of timeout period */
;;;411      ethernet_timeout = Timer_GetTimestamp() + ETHERNET_TIMEOUT;
000496  f7fffffe          BL       Timer_GetTimestamp
00049a  49ae              LDR      r1,|L1.1876|
00049c  1840              ADDS     r0,r0,r1
00049e  49ae              LDR      r1,|L1.1880|
0004a0  6008              STR      r0,[r1,#0]  ; ethernet_timeout
;;;412    
;;;413      /* Check for Received frames */
;;;414      while(1){
0004a2  e05e              B        |L1.1378|
                  |L1.1188|
;;;415        while(MAC_RXCONSUMEINDEX == MAC_RXPRODUCEINDEX){
0004a4  e024              B        |L1.1264|
                  |L1.1190|
;;;416    #if LED_ENABLED
;;;417          /* increment the counter and check timeout  */
;;;418    	  if (k++ > 200000) {
0004a6  9801              LDR      r0,[sp,#4]
0004a8  1c41              ADDS     r1,r0,#1
0004aa  9101              STR      r1,[sp,#4]
0004ac  49ab              LDR      r1,|L1.1884|
0004ae  4288              CMP      r0,r1
0004b0  dd13              BLE      |L1.1242|
;;;419    	     k=0;
0004b2  2000              MOVS     r0,#0
0004b4  9001              STR      r0,[sp,#4]
;;;420    		 /* toogle the LED           */
;;;421    	     if (FIO2PIN & (1<<PORT2_PIN))
0004b6  48aa              LDR      r0,|L1.1888|
0004b8  6940              LDR      r0,[r0,#0x14]
0004ba  2180              MOVS     r1,#0x80
0004bc  4008              ANDS     r0,r0,r1
0004be  2800              CMP      r0,#0
0004c0  d005              BEQ      |L1.1230|
;;;422    	       FIO2CLR |= (1<<PORT2_PIN);
0004c2  48a7              LDR      r0,|L1.1888|
0004c4  69c0              LDR      r0,[r0,#0x1c]
0004c6  4308              ORRS     r0,r0,r1
0004c8  49a5              LDR      r1,|L1.1888|
0004ca  61c8              STR      r0,[r1,#0x1c]
0004cc  e005              B        |L1.1242|
                  |L1.1230|
;;;423    	     else
;;;424    	       FIO2SET |= (1<<PORT2_PIN);
0004ce  48a4              LDR      r0,|L1.1888|
0004d0  6980              LDR      r0,[r0,#0x18]
0004d2  2180              MOVS     r1,#0x80
0004d4  4308              ORRS     r0,r0,r1
0004d6  49a2              LDR      r1,|L1.1888|
0004d8  6188              STR      r0,[r1,#0x18]
                  |L1.1242|
;;;425    	  }
;;;426    #endif
;;;427    
;;;428    	  /* no filtered packets received during timeout period */
;;;429          if (Timer_HasTimestampExpired(ethernet_timeout))
0004da  489f              LDR      r0,|L1.1880|
0004dc  6800              LDR      r0,[r0,#0]  ; ethernet_timeout
0004de  f7fffffe          BL       Timer_HasTimestampExpired
0004e2  2800              CMP      r0,#0
0004e4  d004              BEQ      |L1.1264|
;;;430    	  {
;;;431    #if ETHERNET_DEBUG
;;;432            print("Timed out - going back to looking for handshake\n");
;;;433    #endif
;;;434    	    return 1;
0004e6  2001              MOVS     r0,#1
                  |L1.1256|
;;;435    	  }
;;;436        }
;;;437    
;;;438        idx = MAC_RXCONSUMEINDEX;
;;;439    
;;;440        /* check for crc error */
;;;441    	if (RX_STAT_INFO(idx) & RINFO_CRC_ERR)
;;;442    	{
;;;443    #if ETHERNET_DEBUG
;;;444          print("Rx CRC error\n");
;;;445    #endif
;;;446          /* ignore frame */
;;;447          if (++idx == NUM_RX_FRAG)
;;;448      	  idx = 0;   
;;;449    	  MAC_RXCONSUMEINDEX = idx;
;;;450          continue;
;;;451    	}
;;;452    
;;;453        /* Get the Length and a pointer to the data  */
;;;454        RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3;				 
;;;455        rxptr = (unsigned short *)RX_DESC_PACKET(idx);
;;;456        CopyFromFrame_EMAC(rxbuffer, RxLen);
;;;457        if (++idx == NUM_RX_FRAG)
;;;458    	  idx = 0;   
;;;459    	MAC_RXCONSUMEINDEX = idx;
;;;460        if(filter_pass())
;;;461          break;
;;;462      } 
;;;463      /* limit incoming data for protection  */
;;;464      if ((RxLen-42) > max_len)
;;;465        RxLen = max_len + 42;
;;;466      memcpy(buf,PAYLOADr->data,RxLen-42);
;;;467    
;;;468      /* detect '0x0A' (string terminator) and replace it by CR+LF  */
;;;469      for(i=0;i<max_len;i++) {
;;;470        if(buf[i]==CR){
;;;471    	  buf[i]='\0';
;;;472    	  break;
;;;473    	}
;;;474      }
;;;475      (*count) = i;
;;;476    
;;;477    #if ETHERNET_DEBUG
;;;478      /* print received command   */
;;;479      print("Rx:  ");
;;;480      if (RxLen > 60) {
;;;481    	print("...Data...");
;;;482      }else{
;;;483        j=0;
;;;484        for(i=0; i<(*count); i++) {
;;;485    	  printascii(buf[i]);
;;;486          j++;
;;;487          if (j==16) {
;;;488            j=0;
;;;489            print("\r\n     ");
;;;490          }
;;;491        }
;;;492      }
;;;493      print("\r\n-------------------\r\n");
;;;494    #endif
;;;495    
;;;496        // reset timestamp for end of timeout period
;;;497        ethernet_timeout = Timer_GetTimestamp() + ETHERNET_TIMEOUT;
;;;498    
;;;499        return (0);
;;;500    }
0004e8  b005              ADD      sp,sp,#0x14
0004ea  bcf0              POP      {r4-r7}
0004ec  bc08              POP      {r3}
0004ee  4718              BX       r3
                  |L1.1264|
0004f0  489c              LDR      r0,|L1.1892|
0004f2  6980              LDR      r0,[r0,#0x18]         ;415
0004f4  499b              LDR      r1,|L1.1892|
0004f6  6949              LDR      r1,[r1,#0x14]         ;415
0004f8  4288              CMP      r0,r1                 ;415
0004fa  d0d4              BEQ      |L1.1190|
0004fc  4899              LDR      r0,|L1.1892|
0004fe  6984              LDR      r4,[r0,#0x18]         ;438
000500  00e0              LSLS     r0,r4,#3              ;441
000502  4999              LDR      r1,|L1.1896|
000504  1840              ADDS     r0,r0,r1              ;441
000506  6c80              LDR      r0,[r0,#0x48]         ;441
000508  0409              LSLS     r1,r1,#16             ;441
00050a  4008              ANDS     r0,r0,r1              ;441
00050c  2800              CMP      r0,#0                 ;441
00050e  d007              BEQ      |L1.1312|
000510  1c60              ADDS     r0,r4,#1              ;447
000512  0004              MOVS     r4,r0                 ;447
000514  2819              CMP      r0,#0x19              ;447
000516  d100              BNE      |L1.1306|
000518  2400              MOVS     r4,#0                 ;448
                  |L1.1306|
00051a  4892              LDR      r0,|L1.1892|
00051c  6184              STR      r4,[r0,#0x18]         ;449
00051e  e020              B        |L1.1378|
                  |L1.1312|
000520  00e0              LSLS     r0,r4,#3              ;454
000522  4991              LDR      r1,|L1.1896|
000524  1840              ADDS     r0,r0,r1              ;454
000526  6c80              LDR      r0,[r0,#0x48]         ;454
000528  0540              LSLS     r0,r0,#21             ;454
00052a  0d40              LSRS     r0,r0,#21             ;454
00052c  1ec0              SUBS     r0,r0,#3              ;454
00052e  0407              LSLS     r7,r0,#16             ;454
000530  0c3f              LSRS     r7,r7,#16             ;454
000532  00e0              LSLS     r0,r4,#3              ;455
000534  498c              LDR      r1,|L1.1896|
000536  3980              SUBS     r1,r1,#0x80           ;455
000538  1840              ADDS     r0,r0,r1              ;455
00053a  6800              LDR      r0,[r0,#0]            ;455
00053c  498b              LDR      r1,|L1.1900|
00053e  6008              STR      r0,[r1,#0]            ;455  ; rxptr
000540  0039              MOVS     r1,r7                 ;456
000542  488b              LDR      r0,|L1.1904|
000544  f7fffffe          BL       CopyFromFrame_EMAC
000548  1c60              ADDS     r0,r4,#1              ;457
00054a  0004              MOVS     r4,r0                 ;457
00054c  2819              CMP      r0,#0x19              ;457
00054e  d100              BNE      |L1.1362|
000550  2400              MOVS     r4,#0                 ;458
                  |L1.1362|
000552  4884              LDR      r0,|L1.1892|
000554  6184              STR      r4,[r0,#0x18]         ;459
000556  f7fffffe          BL       filter_pass
00055a  2800              CMP      r0,#0                 ;460
00055c  d000              BEQ      |L1.1376|
00055e  e001              B        |L1.1380|
                  |L1.1376|
000560  46c0              MOV      r8,r8                 ;450
                  |L1.1378|
000562  e79f              B        |L1.1188|
                  |L1.1380|
000564  46c0              MOV      r8,r8                 ;461
000566  0038              MOVS     r0,r7                 ;464
000568  382a              SUBS     r0,r0,#0x2a           ;464
00056a  42b0              CMP      r0,r6                 ;464
00056c  dd03              BLE      |L1.1398|
00056e  0030              MOVS     r0,r6                 ;465
000570  302a              ADDS     r0,r0,#0x2a           ;465
000572  0407              LSLS     r7,r0,#16             ;465
000574  0c3f              LSRS     r7,r7,#16             ;465
                  |L1.1398|
000576  003a              MOVS     r2,r7                 ;466
000578  3a2a              SUBS     r2,r2,#0x2a           ;466
00057a  497d              LDR      r1,|L1.1904|
00057c  312a              ADDS     r1,r1,#0x2a           ;466
00057e  9802              LDR      r0,[sp,#8]            ;466
000580  f7fffffe          BL       __aeabi_memcpy
000584  2500              MOVS     r5,#0                 ;469
000586  e008              B        |L1.1434|
                  |L1.1416|
000588  9802              LDR      r0,[sp,#8]            ;470
00058a  5d40              LDRB     r0,[r0,r5]            ;470
00058c  280d              CMP      r0,#0xd               ;470
00058e  d103              BNE      |L1.1432|
000590  2100              MOVS     r1,#0                 ;471
000592  9802              LDR      r0,[sp,#8]            ;471
000594  5541              STRB     r1,[r0,r5]            ;471
000596  e002              B        |L1.1438|
                  |L1.1432|
000598  1c6d              ADDS     r5,r5,#1              ;469
                  |L1.1434|
00059a  42b5              CMP      r5,r6                 ;469
00059c  d3f4              BCC      |L1.1416|
                  |L1.1438|
00059e  46c0              MOV      r8,r8                 ;472
0005a0  9804              LDR      r0,[sp,#0x10]         ;475
0005a2  6005              STR      r5,[r0,#0]            ;475
0005a4  f7fffffe          BL       Timer_GetTimestamp
0005a8  496a              LDR      r1,|L1.1876|
0005aa  1840              ADDS     r0,r0,r1              ;497
0005ac  496a              LDR      r1,|L1.1880|
0005ae  6008              STR      r0,[r1,#0]            ;497  ; ethernet_timeout
0005b0  2000              MOVS     r0,#0                 ;499
0005b2  e799              B        |L1.1256|
;;;501    
                          ENDP

                  emac_sendline_crlf PROC
;;;502    unsigned emac_sendline_crlf(char * buf) {  
0005b4  b5f8              PUSH     {r3-r7,lr}
0005b6  0006              MOVS     r6,r0
;;;503      int i;
;;;504      unsigned int idx;
;;;505    
;;;506    #if ETHERNET_DEBUG
;;;507      int j;
;;;508    #endif
;;;509    
;;;510      /* detect '\0' (string terminator) and replace it by CR+LF  */
;;;511      for(i=0;i<CMD_SIZE;i++) {
0005b8  2400              MOVS     r4,#0
0005ba  e00d              B        |L1.1496|
                  |L1.1468|
;;;512        PAYLOADt->data[i] = buf[i] ;			
0005bc  5d31              LDRB     r1,[r6,r4]
0005be  486d              LDR      r0,|L1.1908|
0005c0  5501              STRB     r1,[r0,r4]
;;;513        if(buf[i]=='\0'){
0005c2  5d30              LDRB     r0,[r6,r4]
0005c4  2800              CMP      r0,#0
0005c6  d106              BNE      |L1.1494|
;;;514    	  PAYLOADt->data[i]=CR;
0005c8  210d              MOVS     r1,#0xd
0005ca  486a              LDR      r0,|L1.1908|
0005cc  5501              STRB     r1,[r0,r4]
;;;515    	  PAYLOADt->data[i+1]=LF;
0005ce  220a              MOVS     r2,#0xa
0005d0  1c61              ADDS     r1,r4,#1
0005d2  5442              STRB     r2,[r0,r1]
;;;516    	  break;
0005d4  e002              B        |L1.1500|
                  |L1.1494|
0005d6  1c64              ADDS     r4,r4,#1              ;511
                  |L1.1496|
0005d8  2c46              CMP      r4,#0x46              ;511
0005da  dbef              BLT      |L1.1468|
                  |L1.1500|
0005dc  46c0              MOV      r8,r8
;;;517    	}
;;;518      }
;;;519      data_size = i+2;
0005de  1ca0              ADDS     r0,r4,#2
0005e0  4965              LDR      r1,|L1.1912|
0005e2  8008              STRH     r0,[r1,#0]
;;;520    
;;;521    #if ETHERNET_DEBUG
;;;522      print("Tx:  ");
;;;523      j=0;
;;;524      for(i=0; i<data_size-2; i++) {
;;;525    	printascii(buf[i]);
;;;526        j++;
;;;527        if (j==16) {
;;;528          j=0;
;;;529          print("\r\n     ");
;;;530        }
;;;531      }
;;;532      print("\r\n-------------------\r\n");
;;;533    #endif
;;;534        
;;;535      idx  = MAC_TXPRODUCEINDEX;
0005e4  485f              LDR      r0,|L1.1892|
0005e6  6a85              LDR      r5,[r0,#0x28]
;;;536      txptr = (unsigned short *)TX_DESC_PACKET(idx);
0005e8  00e8              LSLS     r0,r5,#3
0005ea  4964              LDR      r1,|L1.1916|
0005ec  1840              ADDS     r0,r0,r1
0005ee  6900              LDR      r0,[r0,#0x10]
0005f0  4963              LDR      r1,|L1.1920|
0005f2  6008              STR      r0,[r1,#0]  ; txptr
;;;537      TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST;
0005f4  4860              LDR      r0,|L1.1912|
0005f6  8800              LDRH     r0,[r0,#0]  ; data_size
0005f8  302a              ADDS     r0,r0,#0x2a
0005fa  2101              MOVS     r1,#1
0005fc  0789              LSLS     r1,r1,#30
0005fe  1840              ADDS     r0,r0,r1
000600  00e9              LSLS     r1,r5,#3
000602  4a5e              LDR      r2,|L1.1916|
000604  1889              ADDS     r1,r1,r2
000606  6148              STR      r0,[r1,#0x14]
;;;538      memcpy(FRAMEt->destination,FRAMEr->source,6);
000608  2206              MOVS     r2,#6
00060a  4959              LDR      r1,|L1.1904|
00060c  1d89              ADDS     r1,r1,#6
00060e  4859              LDR      r0,|L1.1908|
000610  382a              SUBS     r0,r0,#0x2a
000612  f7fffffe          BL       __aeabi_memcpy
;;;539      memcpy(FRAMEt->source,MyMAC,6);
000616  2206              MOVS     r2,#6
000618  495a              LDR      r1,|L1.1924|
00061a  4856              LDR      r0,|L1.1908|
00061c  3824              SUBS     r0,r0,#0x24
00061e  f7fffffe          BL       __aeabi_memcpy
;;;540      PACKETt->iplen = HTONS(FrameSize - EtherHdrLen);
000622  4855              LDR      r0,|L1.1912|
000624  7800              LDRB     r0,[r0,#0]  ; data_size
000626  301c              ADDS     r0,r0,#0x1c
000628  0201              LSLS     r1,r0,#8
00062a  4853              LDR      r0,|L1.1912|
00062c  8800              LDRH     r0,[r0,#0]  ; data_size
00062e  301c              ADDS     r0,r0,#0x1c
000630  22ff              MOVS     r2,#0xff
000632  0212              LSLS     r2,r2,#8
000634  4010              ANDS     r0,r0,r2
000636  1200              ASRS     r0,r0,#8
000638  4301              ORRS     r1,r1,r0
00063a  484e              LDR      r0,|L1.1908|
00063c  382a              SUBS     r0,r0,#0x2a
00063e  8201              STRH     r1,[r0,#0x10]
;;;541      memcpy(PACKETt->destipaddr,PACKETr->srcipaddr,4);
000640  494b              LDR      r1,|L1.1904|
000642  8b4a              LDRH     r2,[r1,#0x1a]
000644  83c2              STRH     r2,[r0,#0x1e]
000646  8b89              LDRH     r1,[r1,#0x1c]
000648  8401              STRH     r1,[r0,#0x20]
;;;542      memcpy(PACKETt->srcipaddr,PACKETr->destipaddr,4);
00064a  4949              LDR      r1,|L1.1904|
00064c  8bca              LDRH     r2,[r1,#0x1e]
00064e  8342              STRH     r2,[r0,#0x1a]
000650  8c09              LDRH     r1,[r1,#0x20]
000652  8381              STRH     r1,[r0,#0x1c]
;;;543      PACKETt->iphdrchksum = 0;
000654  2100              MOVS     r1,#0
000656  8301              STRH     r1,[r0,#0x18]
;;;544      PACKETt->iphdrchksum = HTONS(chksum16(PACKETt->fill1, IpHdrLen));
000658  2114              MOVS     r1,#0x14
00065a  300e              ADDS     r0,r0,#0xe
00065c  f7fffffe          BL       chksum16
000660  0207              LSLS     r7,r0,#8
000662  2114              MOVS     r1,#0x14
000664  4843              LDR      r0,|L1.1908|
000666  381c              SUBS     r0,r0,#0x1c
000668  f7fffffe          BL       chksum16
00066c  21ff              MOVS     r1,#0xff
00066e  0209              LSLS     r1,r1,#8
000670  4008              ANDS     r0,r0,r1
000672  1200              ASRS     r0,r0,#8
000674  4307              ORRS     r7,r7,r0
000676  483f              LDR      r0,|L1.1908|
000678  382a              SUBS     r0,r0,#0x2a
00067a  8307              STRH     r7,[r0,#0x18]
;;;545      PACKETt->destport = PACKETr->srcport;
00067c  483c              LDR      r0,|L1.1904|
00067e  8c41              LDRH     r1,[r0,#0x22]
000680  483c              LDR      r0,|L1.1908|
000682  382a              SUBS     r0,r0,#0x2a
000684  8481              STRH     r1,[r0,#0x24]
;;;546      PACKETt->srcport = PACKETr->destport;
000686  483a              LDR      r0,|L1.1904|
000688  8c81              LDRH     r1,[r0,#0x24]
00068a  483a              LDR      r0,|L1.1908|
00068c  382a              SUBS     r0,r0,#0x2a
00068e  8441              STRH     r1,[r0,#0x22]
;;;547      PACKETt->udplen = HTONS(FrameSize - EtherHdrLen - IpHdrLen);
000690  4839              LDR      r0,|L1.1912|
000692  7800              LDRB     r0,[r0,#0]  ; data_size
000694  3008              ADDS     r0,r0,#8
000696  0201              LSLS     r1,r0,#8
000698  4837              LDR      r0,|L1.1912|
00069a  8800              LDRH     r0,[r0,#0]  ; data_size
00069c  3008              ADDS     r0,r0,#8
00069e  22ff              MOVS     r2,#0xff
0006a0  0212              LSLS     r2,r2,#8
0006a2  4010              ANDS     r0,r0,r2
0006a4  1200              ASRS     r0,r0,#8
0006a6  4301              ORRS     r1,r1,r0
0006a8  4832              LDR      r0,|L1.1908|
0006aa  382a              SUBS     r0,r0,#0x2a
0006ac  84c1              STRH     r1,[r0,#0x26]
;;;548      PACKETt->udpchksum = 0;
0006ae  2100              MOVS     r1,#0
0006b0  8501              STRH     r1,[r0,#0x28]
;;;549      CopyToFrame_EMAC(&txbuffer[0], FrameSize);
0006b2  4831              LDR      r0,|L1.1912|
0006b4  8801              LDRH     r1,[r0,#0]  ; data_size
0006b6  312a              ADDS     r1,r1,#0x2a
0006b8  482e              LDR      r0,|L1.1908|
0006ba  382a              SUBS     r0,r0,#0x2a
0006bc  f7fffffe          BL       CopyToFrame_EMAC
;;;550      if (++idx == NUM_TX_FRAG) idx = 0;
0006c0  1c68              ADDS     r0,r5,#1
0006c2  0005              MOVS     r5,r0
0006c4  2803              CMP      r0,#3
0006c6  d100              BNE      |L1.1738|
0006c8  2500              MOVS     r5,#0
                  |L1.1738|
;;;551      MAC_TXPRODUCEINDEX = idx;  
0006ca  4826              LDR      r0,|L1.1892|
0006cc  6285              STR      r5,[r0,#0x28]
;;;552      return (1);
0006ce  2001              MOVS     r0,#1
;;;553    }
0006d0  bcf8              POP      {r3-r7}
0006d2  bc08              POP      {r3}
0006d4  4718              BX       r3
;;;554    
                          ENDP

                  emac_handshake PROC
;;;555    void emac_handshake(void) {
0006d6  b500              PUSH     {lr}
0006d8  b089              SUB      sp,sp,#0x24
;;;556    
;;;557       int count;
;;;558       char buf[15];
;;;559       char buf1[15];
;;;560    
;;;561       synchro = false;
0006da  2000              MOVS     r0,#0
0006dc  492a              LDR      r1,|L1.1928|
0006de  7008              STRB     r0,[r1,#0]
;;;562    
;;;563       while(1) {
0006e0  e032              B        |L1.1864|
                  |L1.1762|
;;;564         if (emac_getline(buf,1,&count) == 0) {
0006e2  aa08              ADD      r2,sp,#0x20
0006e4  2101              MOVS     r1,#1
0006e6  a804              ADD      r0,sp,#0x10
0006e8  f7fffffe          BL       emac_getline
0006ec  2800              CMP      r0,#0
0006ee  d12b              BNE      |L1.1864|
;;;565           if (buf[0] == '?') {					  
0006f0  4668              MOV      r0,sp
0006f2  7c00              LDRB     r0,[r0,#0x10]
0006f4  283f              CMP      r0,#0x3f
0006f6  d127              BNE      |L1.1864|
;;;566      	     /* save Dest & Source Ports   */
;;;567     	     DestPort = PACKETr->destport;
0006f8  481d              LDR      r0,|L1.1904|
0006fa  8c80              LDRH     r0,[r0,#0x24]
0006fc  4923              LDR      r1,|L1.1932|
0006fe  8008              STRH     r0,[r1,#0]
;;;568    	     SrcPort  = PACKETr->srcport;
000700  481b              LDR      r0,|L1.1904|
000702  8c40              LDRH     r0,[r0,#0x22]
000704  4922              LDR      r1,|L1.1936|
000706  8008              STRH     r0,[r1,#0]
;;;569    
;;;570    #if ETHERNET_DEBUG
;;;571             /* print Dest & Source Ports   */
;;;572    	     print("Dest: ");
;;;573    	     printhexa((DestPort>>8)&0xFF);
;;;574    	     printhexa(DestPort&0xFF);
;;;575    	     print("\nSource: ");
;;;576    	     printhexa((SrcPort>>8)&0xFF);
;;;577    	     printhexa(SrcPort&0xFF);
;;;578    	     print("\n");
;;;579    #endif
;;;580             /* save Host MAC address   */
;;;581    	     memcpy(HostMAC,FRAMEr->source,6);
000708  2206              MOVS     r2,#6
00070a  4919              LDR      r1,|L1.1904|
00070c  1d89              ADDS     r1,r1,#6
00070e  4821              LDR      r0,|L1.1940|
000710  f7fffffe          BL       __aeabi_memcpy
;;;582    
;;;583    #if ETHERNET_DEBUG
;;;584             /* print Host MAC address  */
;;;585    	     print("\nSource MAC: ");
;;;586    	     printhexa(HostMAC[5]);
;;;587    	     printhexa(HostMAC[4]);
;;;588    	     printhexa(HostMAC[3]);
;;;589    	     printhexa(HostMAC[2]);
;;;590    	     printhexa(HostMAC[1]);
;;;591    	     printhexa(HostMAC[0]);
;;;592    	     print("\n");
;;;593    #endif
;;;594    
;;;595             emac_sendline_crlf((char *)&sync[0]);         
000714  4820              LDR      r0,|L1.1944|
000716  f7fffffe          BL       emac_sendline_crlf
;;;596             emac_getline(buf,15,&count);
00071a  aa08              ADD      r2,sp,#0x20
00071c  210f              MOVS     r1,#0xf
00071e  a804              ADD      r0,sp,#0x10
000720  f7fffffe          BL       emac_getline
;;;597    	     memcpy(&buf1[0],&sync[0],sizeof(sync));
000724  220d              MOVS     r2,#0xd
000726  491c              LDR      r1,|L1.1944|
000728  4668              MOV      r0,sp
00072a  f7fffffe          BL       __aeabi_memcpy
;;;598    	     if (str_cmp(&buf[0],&buf1[0])==0) {
00072e  4669              MOV      r1,sp
000730  a804              ADD      r0,sp,#0x10
000732  f7fffffe          BL       str_cmp
000736  2800              CMP      r0,#0
000738  d106              BNE      |L1.1864|
;;;599               emac_sendline_crlf((char *)&Ok[0]);
00073a  4818              LDR      r0,|L1.1948|
00073c  f7fffffe          BL       emac_sendline_crlf
;;;600    		   synchro = true;
000740  2001              MOVS     r0,#1
000742  4911              LDR      r1,|L1.1928|
000744  7008              STRB     r0,[r1,#0]
;;;601    		   break;
000746  e000              B        |L1.1866|
                  |L1.1864|
000748  e7cb              B        |L1.1762|
                  |L1.1866|
00074a  46c0              MOV      r8,r8
;;;602    	     }
;;;603           }
;;;604    	 }
;;;605       }
;;;606    }
00074c  b009              ADD      sp,sp,#0x24
00074e  bc08              POP      {r3}
000750  4718              BX       r3
;;;607    
                          ENDP

000752  0000              DCW      0x0000
                  |L1.1876|
                          DCD      0x0000ea60
                  |L1.1880|
                          DCD      ethernet_timeout
                  |L1.1884|
                          DCD      0x00030d40
                  |L1.1888|
                          DCD      0x3fffc040
                  |L1.1892|
                          DCD      0xffe00100
                  |L1.1896|
                          DCD      0x7fe00080
                  |L1.1900|
                          DCD      rxptr
                  |L1.1904|
                          DCD      rxbuffer
                  |L1.1908|
                          DCD      txbuffer+0x2a
                  |L1.1912|
                          DCD      data_size
                  |L1.1916|
                          DCD      0x7fe00180
                  |L1.1920|
                          DCD      txptr
                  |L1.1924|
                          DCD      MyMAC
                  |L1.1928|
                          DCD      synchro
                  |L1.1932|
                          DCD      DestPort
                  |L1.1936|
                          DCD      SrcPort
                  |L1.1940|
                          DCD      HostMAC
                  |L1.1944|
                          DCD      sync
                  |L1.1948|
                          DCD      ||Ok||

                          AREA ||.bss||, DATA, NOINIT, ALIGN=0

                  rxbuffer
                          %        120
                  txbuffer
                          %        120

                          AREA ||.constdata||, DATA, READONLY, ALIGN=0

                  sync
000000  53796e63          DCB      0x53,0x79,0x6e,0x63
000004  68726f6e          DCB      0x68,0x72,0x6f,0x6e
000008  697a6564          DCB      0x69,0x7a,0x65,0x64
00000c  00                DCB      0x00
                  ||Ok||
00000d  4f4b00            DCB      0x4f,0x4b,0x00

                          AREA ||.data||, DATA, ALIGN=2

                  synchro
000000  00                DCB      0x00
                  MyMAC
000001  000000            DCB      0x00,0x00,0x00
000004  000000            DCB      0x00,0x00,0x00
                  HostMAC
000007  00                DCB      0x00
                          DCD      0x00000000
00000c  0000              DCB      0x00,0x00
                  DestPort
00000e  0000              DCB      0x00,0x00
                  SrcPort
000010  0000              DCB      0x00,0x00
                  data_size
000012  0000              DCW      0x0000
                  rxptr
                          DCD      0x00000000
                  txptr
                          DCD      0x00000000
                  ethernet_timeout
                          DCD      0x00000000
